FPGA to DW/Osmond is a tool for electrical engineers designing with Xilinx FPGAs.

I hope to add support for Lattice Semiconductor someday. Click here for running FPGA software on a Mac.

This application opens a file generated using Xilinx’s partgen command line utility. You must use the -v option when running partgen (partgen -v <partnumber>). This application will then allow you to save a file of strings useful for creating symbols in DesignWorks, and allow you to save a Osmond PCB footprint of the Xilinx device.

The Xilinx partgen file is a white space delimited file with all the required pin data for creating text useful for DesignWorks “Auto Create Symbol” tool and library files for Osmond PCB layout program. Since the partgen file is white space delimited, there must be white space between every element between each column. This obvious point is sometimes lost on Xilinx. For example a partgen file of a Virtex 4 family device with MGTs will have columns run together on some of the MGTs power pins in ISE 8 & 9, requiring a little editing of the file before my program can correctly use it.

FPGA to DesignWorks/Osmond

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